High leakage current in deep-submicrometer regimes is becoming a significant contributor to power dissipation of CMOS circuits as threshold voltage, channel length, and gate oxide thickness are reduced. Consequently, the identification and modeling of different leakage components is very important for estimation and reduction of leakage power, especially for low-power applications. This paper reviews various transistor intrinsic leakage mechanisms, including weak inversion, drain-induced barrier lowering, gate-induced drain leakage, and gate oxide tunneling.
Channel engineering techniques including retrograde well and halo doping are explained as means to manage short-channel effects for continuous scaling of CMOS devices. Finally, the paperexplores different circuit techniques to reduce the leakage power consumption.
Leakage Current Mechanisms and Leakage Reduction Techniques in Deep-Submicrometer CMOS Circuits
Mar 14
Albert Einstein has long been considered a genius by the masses. He was a theoretical physicist, philosopher, author, and is perhaps the most influential scientists to ever live.
Einstein has made great contributions to the scientific world, including the theory of relativity, the founding of relativistic cosmology, the prediction of the deflection of light by gravity, the quantum theory of atomic motion in solids, the zero-point energy concept, and the quantum theory of a monatomic gas which predicted Bose–Einstein condensation, to name a few of his scientific contributions.
Today’s development of semiconductor devices strongly depends on the aid of process and device simulation. The down-scaling of the feature sizes creates needs for advanced simulation models. These models must be able to predict the dopant profiles even for sub-micron technologies. Within this work we present several models to simulate the ion implantation and the diffusion processes in nonplanar arbitrary structures. Both modules are included into the set of process simulators of the VISTA ( Viennese Integrated System of TCAD Applications) project.
For the past few years Intel, AMD, IBM, Sun, and other microprocessor vendors have been aggressively promoting the concept of multicores. Multicore processors contain multiple executions units or cores on the same silicon die and are packaged as a single module. The message has been that more cores are better than a single core or CPU. Last January, however, Intel and IBM made a highly unorthodox joint announcement. What makes this announcement unorthodox is that IBM and AMD have formed a partnership in the manufacture of future microprocessors, so IBM and Intel are competitors in this context. In case you missed it, here’s what they said in a nutshell. Intel and IBM will produce single CPU parts using state-of-the-art 45 nanometer (nm) technology. Intel said it is converting all its manufacturing facilities (fab lines, in the vernacular) and will produce 45 nm microprocessors (code named penryn) by the end of this year. The IBM and AMD schedule is a bit less aggressive but they expect to ship their respective Power series and Opteron series microprocessors by the middle of 2008.
COLOUR SENSOR ROBOT
Feb 16
Colour sensor is an interesting project for hobbyists. The circuit can sense eight colours, i.e. blue, green and red (primary colours); magenta, yellow and cyan (secondary colours); and black and white.
Perhaps the two most distinguishing characteristics of a computer are its processor clock speed and
the size of its main memory. While it is relatively easy to understand the concept of main memory
size (the number of storage bits in the computer), the concept of processor clock speed is a little
more difficult to grasp. In this document we will explain what is meant by sequential circuit clock
speed, and more importantly, how to calculate it using the timing parameters of combinational and
sequential circuit components.
Timing, an important parameter associated with Sequential Circuit design will be discussed in this tutorial. We will begin with the general concepts associated with timing and then will proceed with examples to better understand their application to digital design.
Our farm gets its power from traditional silicon solar panels. But I have long been interested in the idea of using tiny antennas that resonate at light frequencies to collect solar power using what are called rectennas. A rectenna is an antenna connected to a diode that “rectifies” alternating current into direct current.
Making antennas half the size of a wavelength of light is a nanotechnology challenge, but several designs have been fabricated and tested in laboratories. The main reason for the excitement is that such a system can, in theory, reach efficiencies of 85%, compared to silicon efficiencies below 30%.
CMOS Transistor Theory
Jan 31
Conventional non-deep submicron transistor model
Adjustments to VTfor non-ideal 2nd-order effects
–Body Effect
–Velocity Saturation
–Leakage
–Channel Length Modulation
–Mobility Variation
–Tunnelling
–Punchthrough
–Avalanche Breakdown
–Impact Ionization
–Temperature
Summary
Silicon Processing Technology Steps
n-Well CMOS Technology
p-Well, Twin Tub, and Triple Well Technologies
Deep submicron fabrication technology
Trench Isolation
Antenna Rules
CMP Rules
Summary